Cypress Semiconductor EZ-Host CY7C67300 User Manual Page 69

  • Download
  • Add to my manuals
  • Print
  • Page
    / 120
  • Table of contents
  • BOOKMARKS
  • Rated. / 5. Based on customer reviews
Page view 68
CY7C6730
0
PRELIMINARY
Document #: 38-08015 Rev. *D Page 69 of 120
SAS Enable (Bit 11)
The SAS Enable bit, when in SPI mode, will reroute the SPI port SPI_nSSI pin to GPIO[15] rather then GPIO[9] or XD[9] (per
SG/SX).
1: Reroute SPI_nss to GPIO[30]
0: Leave SPI_nss on GPIO[9]
Mode Select (Bits [10:8])
The Mode Select field selects how GPIO[15:0] and GPIO[24:19] are used as defined in Table 7-10.
HSS Enable (Bit 7)
The HSS Enable bit routes HSS to GPIO[26, 18:16]. If the HSS XD Enable bit is set, it will override this bit and HSS will be routed
to XD[15:12].
1: HSS is routed to GPIO
0: HSS is not routed to GPIOs. GPIO[26, 18:16] are free for other purposes.
HSS XD Enable (Bit 6)
The HSS XD Enable bit routes HSS to XD[15:12] (external memory data bus). This bit overrides the HSS Enable bit.
1: HSS is routed to XD[15:12]
0: HSS is not routed to XD[15:12]
SPI Enable (Bit 5)
The SPI Enable bit routes SPI to GPIO[11:8]. If the SAS Enable bit is set, it will override the SPI Enable and route SPI_nSSI to
GPIO15. If the SPI XD Enable bit is set, it will override both bits and the SPI will be routed to XD[11:8] (external memory data bus).
1: SPI is routed to GPIO[11:8]
0: SPI is not routed to GPIO[11:8]. GPIO[11:8] are free for other purposes.
SPI XD Enable (Bit 4)
The SPI XD Enable bit routes SPI to XD[11:8] (external memory data bus). This bit overrides the SPI Enable bit.
1: SPI is routed to XD[11:8]
0: SPI is not routed to XD[11:8]
Interrupt 1 Polarity Select (Bit 3)
The Interrupt 1 Polarity Select bit selects the polarity for IRQ1.
1: Sets IRQ1 to rising edge
0: Sets IRQ1 to falling edge
Interrupt 1 Enable (Bit 2)
The Interrupt 1 Enable bit enables or disables IRQ1. The GPIO bit on the interrupt Enable Register must also be set in order for
this for this interrupt to be enabled.
1: Enable IRQ1
0: Disable IRQ1
Table 7-10. Mode Select Definition
Mode Select [10:8] GPIO Configuration
111 Reserved
110 SCAN — (HW) Scan diagnostic. For production test only. Not for normal operation
101 HPI — Host Port Interface
100 IDE — Integrated Drive Electronics or
011 Reserved
010 Reserved
001 Reserved
000 GPIO — General Purpose Input Output
Page view 68
1 2 ... 64 65 66 67 68 69 70 71 72 73 74 ... 119 120

Comments to this Manuals

No comments