Cypress Semiconductor EZ-Host CY7C67300 User Manual Page 63

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CY7C6730
0
PRELIMINARY
Document #: 38-08015 Rev. *D Page 63 of 120
Reserved
All reserved bits should be written as ‘0’.
7.6.8 Device n Address Register [W]
Device 1 Address Register 0xC08E
Device 2 Address Register 0xC0AE
Figure 7-40. Device n Address Register
Register Description
The Device n Address Register holds the device address assigned by the host. This register initializes to the default address 0
at reset but must be updated by firmware when the host assigns a new address. Only USB data sent to the address contained
in this register will be responded to, all others are ignored.
Address (Bits [6:0])
The Address field contains the USB address of the device assigned by the host.
Reserved
All reserved bits should be written as ‘0’.
7.6.9 Device n Status Register [R/W]
Device 1 Status Register 0xC090
Device 2 Status Register 0xC0B0
Figure 7-41. Device n Status Register
Register Description
The Device n Status Register provides status information for device operation. Pending interrupts can be cleared by writing a ‘1’
to the corresponding bit. This register can be accessed by the HPI interface.
VBUS Interrupt Flag (Bit 15)
The VBUS Interrupt Flag bit indicates the status of the OTG VBUS interrupt (only for Port 1A). When enabled this interrupt will
trigger on both the rising and falling edge of VBUS at 4.4V. This bit is only available for Device 1 and is a reserved bit in Device 2.
1: Interrupt triggered
0: Interrupt did not trigger
Bit # 15 14 13 12 11 10 9 8
Field Reserved...
Read/Write - - - - - - - -
Default 0 0 0 0 0 0 0 0
Bit # 7 6 5 4 3 2 1 0
Field ...Reserved Address
Read/Write - W W W W W W W
Default 0 0 0 0 0 0 0 0
Bit # 15 14 13 12 11 10 9 8
Field VBUS Interrupt
Flag
ID Interrupt
Flag
Reserved SOF/EOP
Interrupt Flag
Reset Interrupt
Flag
Read/Write R/W R/W - - - - R/W R/W
Default X X X X X X X X
Bit # 7 6 5 4 3 2 1 0
Field EP7 Interrupt
Flag
EP6 Interrupt
Flag
EP5 Interrupt
Flag
EP4 Interrupt
Flag
EP3 Interrupt
Flag
EP2 Interrupt
Flag
EP1 Interrupt
Flag
EP0 Interrupt
Flag
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Default X X X X X X X X
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