Cypress Semiconductor EZ-Host CY7C67300 User Manual Page 6

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CY7C6730
0
PRELIMINARY
Document #: 38-08015 Rev. *D Page 6 of 120
LIST OF FIGURES
Figure 1-1. Block Diagram ..................................................................................................................... 10
Figure 4-1. Up to 256k x 16 External SRAM Data.................................................................................16
Figure 4-2. Up to 512k x 8 External SRAM Data...................................................................................16
Figure 4-3. Up to 256k x 16 External ROM Code..................................................................................16
Figure 4-4. Up to 512K x 8 External ROM Code ...................................................................................17
Figure 4-5. Charge Pump ...................................................................................................................... 23
Figure 4-6. Power Supply Connection With Booster .............................................................................24
Figure 4-7. Power Supply Connection Without Booster ........................................................................24
Figure 4-8. Crystal Interface .................................................................................................................. 25
Figure 4-9. Minimum Stand-alone Hardware Configuration – Peripheral Only...................................... 26
Figure 6-1. Memory Map ....................................................................................................................... 29
Figure 7-1. Processor Control Registers ............................................................................................... 30
Figure 7-2. CPU Flags Register.............................................................................................................30
Figure 7-3. Bank Register...................................................................................................................... 31
Figure 7-4. Revision Register ................................................................................................................ 32
Figure 7-5. CPU Speed Register...........................................................................................................32
Figure 7-6. Power Control Register .......................................................................................................33
Figure 7-7. Interrupt Enable Register ....................................................................................................35
Figure 7-8. Breakpoint Register............................................................................................................. 36
Figure 7-9. USB Diagnostic Register..................................................................................................... 37
Figure 7-10. Memory Diagnostic Register ............................................................................................. 38
Figure 7-11. External Memory Control Registers ..................................................................................39
Figure 7-12. Extended Page n Map Register ........................................................................................39
Figure 7-13. External Memory Control Register .................................................................................... 40
Figure 7-14. Timer Registers ................................................................................................................. 41
Figure 7-15. Watchdog Timer Register.................................................................................................. 41
Figure 7-16. Timer n Register................................................................................................................ 42
Figure 7-17. General USB Registers.....................................................................................................42
Figure 7-18. USB n Control Register..................................................................................................... 42
Figure 7-19. USB Host Only Register....................................................................................................45
Figure 7-20. Host n Control Register .....................................................................................................45
Figure 7-21. Host n Address Register ...................................................................................................46
Figure 7-22. Host n Count Register.......................................................................................................46
Figure 7-23. Host n Endpoint Status Register ....................................................................................... 47
Figure 7-24. Host n PID Register...........................................................................................................48
Figure 7-25. Host n Count Result Register............................................................................................49
Figure 7-26. Host n Device Address Register ....................................................................................... 50
Figure 7-27. Host n Interrupt Enable Register.......................................................................................50
Figure 7-28. Host n Status Register ......................................................................................................52
Figure 7-29. Host n SOF/EOP Count Register......................................................................................53
Figure 7-30. Host n SOF/EOP Counter Register................................................................................... 54
Figure 7-31. Host n Frame Register ...................................................................................................... 54
Figure 7-32. USB Device Only Registers .............................................................................................. 55
Figure 7-33. Device n Endpoint n Register............................................................................................55
Figure 7-34. Device n Endpoint n Address Register..............................................................................57
Figure 7-35. Device n Endpoint n Count Register .................................................................................57
Figure 7-36. Device n Endpoint n Status Register.................................................................................58
Figure 7-37. Device n Endpoint n Count Result Register......................................................................60
Figure 7-38. Device n Port Select Register ...........................................................................................60
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