Cypress Semiconductor EZ-Host CY7C67300 User Manual download pdf (Page 50)

CY7C6730

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Reserved

All reserved bits should be written as ‘0’.

7.5.7 Host n Device Address Register [W]

• Host 1 Device Address Register 0xC088.

• Host 2 Device Address Register 0xC0A8.

Figure 7-26. Host n Device Address Register

The Host n Device Address Register is a write-only register that contains the USB Device Address that the host wishes to

communicate with.

Address (Bits [6:0])

The Address field contains the value of the USB address for the next device that the host is going to communicate with. This

value needs to be written by firmware.

Reserved

All reserved bits should bit written as ‘0’.

7.5.8 Host n Interrupt Enable Register [R/W]

• Host 1 Interrupt Enable Register 0xC08C.

• Host 2 Interrupt Enable Register 0xC0AC.

Figure 7-27. Host n Interrupt Enable Register

The Host n Interrupt Enable Register will allow control over host related interrupts.

In this register a bit set to ‘1’ enables the corresponding interrupt while ‘0’ disables the interrupt.

Bit # 15 14 13 12 11 10 9 8

Field Reserved...

Read/Write - - - - - - - -

Default 0 0 0 0 0 0 0 0

Bit # 7 6 5 4 3 2 1 0

Field ...Reserved Address

Read/Write - W W W W W W W

Default 0 0 0 0 0 0 0 0

Bit # 15 14 13 12 11 10 9 8

Field VBUS

Interrupt

Enable

ID Interrupt

Enable

Reserved SOF/EOP

Interrupt

Enable

Reserved

Read/Write R/W R/W - - - - R/W -

Default 0 0 0 0 0 0 0 0

Bit # 7 6 5 4 3 2 1 0

Field Port B

Wake Interrupt

Enable

Port A

Wake Interrupt

Enable

Port B Connect

Change

Interrupt

Enable

Port A Connect

Change

Interrupt

Enable

Reserved Done

Interrupt

Enable

Read/Write R/W R/W R/W R/W - - - R/W

Default 0 0 0 0 0 0 0 0

1 2 ... 45 46 47 48 49 50 51 52 53 54 55 ... 119 120

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Cypress Semiconductor EZ-Host CY7C67300 User Manual Page 50

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