Cypress Semiconductor Perform CY7C1356C User Manual download pdf (Page 22)

CY7C1354V25

CY7C1356V25

PRELIMINARY

Switching Waveforms

CEN

CLK

ADDRESS

WE &

Data-

In/Out

CYC

RA1

CES

CEH

= DON’T CARE

= UNDEFINED

The combination of WE & BWS

(x = a, b, c, d for CY7C1354V25 & x = a, b for CY7C1356V25) define a write cycle

Out

READ

WRITE

DESELECT

WRITE

READ

SUSPEND

READ

DESELECT

WA2

RA3 RA4

WA5

RA6

RA7

CLZ

DOH

Out

CHZ

Device

originally

deselected

Out

CHZ

CENS

CENH

DOH

BWS

READ/WRITE/DESELECT Sequence

CEN HIGH blocks

Out

all synchronous inputs

(see Write Cycle Description table) CE is the combination of CE

, CE

, and CE

. All chip enables need to be active

in order to select the device. Any chip enable can deselect the device. RAx stands for Read Address X, WAx

Write Address X, Dx stands for Data-in for location X, Qx stands for Data-out for location X. ADV/LD

held LOW.

1 2 ... 17 18 19 20 21 22 23 24 25 26

CY7C1354V25 1
CY7C1356V25 1
PRELIMINARY 10
51-85050-A 25
51-85115 26

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Cypress Semiconductor Perform CY7C1356C User Manual Page 22

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