Cypress Semiconductor Perform CY7C1356C User Manual Page 15

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CY7C1354V25
CY7C1356V25
PRELIMINARY
15
TAP AC Switching Characteristics
Over the Operating Range
[9, 10]
Parameter Description Min. Max Unit
t
TCYC
TCK Clock Cycle Time 100 ns
t
TF
TCK Clock Frequency 10 MHz
t
TH
TCK Clock HIGH 40 ns
t
TL
TCK Clock LOW 40 ns
Set-up Times
t
TMSS
TMS Set-up to TCK Clock Rise 10 ns
t
TDIS
TDI Set-up to TCK Clock Rise 10 ns
t
CS
Capture Set-up to TCK Rise 10 ns
Hold Times
t
TMSH
TMS Hold after TCK Clock Rise 10 ns
t
TDIH
TDI Hold after Clock Rise 10 ns
t
CH
Capture Hold after clock rise 10 ns
Output Times
t
TDOV
TCK Clock LOW to TDO Valid 20 ns
t
TDOX
TCK Clock LOW to TDO Invalid 0 ns
Notes:
9. t
CS
and t
CH
refer to the set-up and hold time requirements of latching data from the boundary scan register.
10. Test conditions are specified using the load in TAP AC test conditions. t
R
/t
F
= 1 ns.
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