Cypress Semiconductor Perform CY8C24x94 Specifications

Browse online or download Specifications for Battery chargers Cypress Semiconductor Perform CY8C24x94. Cypress Semiconductor Perform CY8C24x94 Specifications User Manual

  • Download
  • Add to my manuals
  • Print
  • Page
    / 71
  • Table of contents
  • BOOKMARKS
  • Rated. / 5. Based on customer reviews
Page view 0
CY8C24123A
CY8C24223A
CY8C24423A
PSoC
®
Programmable System-on-Chip
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 38-12028 Rev. *V Revised January 13, 2015
PSoC
®
Programmable System-on-Chip
Features
Powerful Harvard-architecture processor
M8C processor speeds up to 24 MHz
8 × 8 multiply, 32-bit accumulate
Low power at high speed
Operating voltage: 2.4 V to 5.25 V
Operating voltages down to 1.0 V using on-chip switch mode
pump (SMP)
Industrial temperature range: –40 °C to +85 °C
Advanced peripherals (PSoC
®
blocks)
Six rail-to-rail analog PSoC blocks provide:
Up to 14-bit analog-to-digital converters (ADCs)
Up to 9-bit digital-to-analog converters (DACs)
Programmable gain amplifiers (PGAs)
Programmable filters and comparators
Four digital PSoC blocks provide:
8- to 32-bit timers and counters, 8- and 16-bit pulse-width
modulators (PWMs)
Cyclical redundancy check (CRC) and pseudo random
sequence (PRS) modules
Full-duplex universal asynchronous receiver transmitter
(UART)
Multiple serial peripheral interface (SPI) masters or slaves
Can connect to all general-purpose I/O (GPIO) pins
Complex peripherals by combining blocks
Precision, programmable clocking
Internal ±5% 24- / 48-MHz main oscillator
High accuracy 24 MHz with optional 32 kHz crystal and
phase-locked loop (PLL)
Optional external oscillator up to 24 MHz
Internal oscillator for watchdog and sleep
Flexible on-chip memory
4 KB flash program storage 50,000 erase/write cycles
256-bytes SRAM data storage
In-system serial programming (ISSP)
Partial flash updates
Flexible protection modes
Electronically erasable programmable read only memory
(EEPROM) emulation in flash
Programmable pin configurations
25-mA sink, 10-mA source on all GPIOs
Pull-up, pull-down, high Z, strong, or open-drain drive modes
on all GPIOs
Eight standard analog inputs on all GPIOs, and
four additional analog inputs with restricted routing
Two 30 mA analog outputs on all GPIOs
Configurable interrupt on all GPIOs
New CY8C24x23A PSoC device
Derived from the CY8C24x23 device
Low power and low voltage (2.4 V)
Additional system resources
I
2
C slave, master, and multi-master to 400 kHz
Watchdog and sleep timers
User-configurable low-voltage detection (LVD)
Integrated supervisory circuit
On-chip precision voltage reference
Complete development tools
Free development software (PSoC Designer™)
Full-featured, in-circuit emulator (ICE), and programmer
Full-speed emulation
Complex breakpoint structure
128 KB trace memory
DIGITAL SYSTEM
SRAM
256 Bytes
Interrupt
Controller
Sleep and
Watchdog
Multiple Clock Sources
(Includes IMO, ILO, PLL, and ECO)
Global Digital Interconnect
Global Analog Interconnect
PSoC CORE
CPU Core (M8C)
SROM Flash 4KB
Digital
Block
Array
Multiply
Accum.
Switch
Mode
Pump
Internal
Voltage
Ref.
Digital
Clocks
POR and LVD
System Resets
Decimator
SYSTEM RESOURCES
ANALOG SYSTEM
Analog
Ref
Analog
Input
Muxing
I
2
C
Port 2 Port 1 Port 0
Analog
Drivers
System Bus
Analog
Block
Array
Logic Block Diagram
Errata: For information on silicon errata, see “Errata” on page 67. Details include trigger conditions, devices affected, and proposed workaround.
Page view 0
1 2 3 4 5 6 ... 70 71

Summary of Contents

Page 1 - Programmable System-on-Chip

CY8C24123ACY8C24223ACY8C24423APSoC® Programmable System-on-ChipCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-

Page 2

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 10 of 71PinoutsThis section describes, lists, and illustrates the CY8C24x23A PSo

Page 3

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 11 of 7120-Pin Part PinoutTable 3. 20-Pin PDIP, SSOP, and SOICPin No.TypePin Na

Page 4

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 12 of 7128-Pin Part PinoutTable 4. 28-Pin PDIP, SSOP, and SOICPin No.TypePin Na

Page 5

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 13 of 7132-Pin Part PinoutTable 5. 32-Pin QFN[7]Pin No.TypePin NameDescriptionF

Page 6

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 14 of 7156-Pin Part PinoutThe 56-pin SSOP part is for the CY8C24000A On-Chip Deb

Page 7

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 15 of 71Register ReferenceThis section lists the registers of the CY8C24x23A PSo

Page 8

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 16 of 71Table 8. Register Map Bank 0 Table: User Space Name Addr (0,Hex) Access

Page 9

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 17 of 71 Table 0-1. Register Map Bank 1 Table: Configuration Space Name Addr (1

Page 10 - CY8C24423A

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 18 of 71Electrical SpecificationsThis section presents the DC and AC electrical

Page 11

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 19 of 71Operating TemperatureDC Electrical CharacteristicsDC Chip-Level Specific

Page 12

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 2 of 71More InformationCypress provides a wealth of data at www.cypress.com to h

Page 13

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 20 of 71DC GPIO SpecificationsThe following tables list the guaranteed maximum a

Page 14

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 21 of 71DC Operational Amplifier SpecificationsThe following tables list the gua

Page 15

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 22 of 71Table 15. 3.3-V DC Operational Amplifier SpecificationsSymbol Descripti

Page 16

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 23 of 71DC Low Power Comparator SpecificationsTab le 17 lists the guaranteed ma

Page 17

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 24 of 71DC Analog Output Buffer SpecificationsThe following tables list the guar

Page 18

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 25 of 71Table 20. 2.7-V DC Analog Output Buffer SpecificationsSymbol Descriptio

Page 19

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 26 of 71DC Switch Mode Pump SpecificationsTab le 21 lists the guaranteed maximu

Page 20

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 27 of 71Figure 10. Basic Switch Mode Pump CircuitBatteryC1D1+PSoCVddVssSMPVBATL

Page 21

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 28 of 71DC Analog Reference SpecificationsThe following tables list the guarante

Page 22

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 29 of 710b010 RefPower = highOpamp bias = highVREFHIRef High VDDVDD – 0.121 VDD

Page 23

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 3 of 71ContentsPSoC Functional Overview ...

Page 24

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 30 of 710b101 RefPower = highOpamp bias = highVREFHIRef High P2[4] + Bandgap (P2

Page 25

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 31 of 71Table 23. 3.3-V DC Analog Reference Specifications Reference ARF_CR[5:3

Page 26

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 32 of 710b100 All power settingsNot allowed at 3.3 V––– – – ––0b101 RefPower = h

Page 27

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 33 of 71Table 24. 2.7-V DC Analog Reference Specifications Reference ARF_CR[5:

Page 28

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 34 of 71DC Analog PSoC Block SpecificationsTab le 23 lists the guaranteed maxim

Page 29

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 35 of 71DC POR, SMP, and LVD SpecificationsTab le 24 lists the guaranteed maxim

Page 30

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 36 of 71DC Programming SpecificationsTab le 27 lists the guaranteed maximum and

Page 31

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 37 of 71AC Electrical CharacteristicsAC Chip-Level SpecificationsThese tables li

Page 32

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 38 of 71DC24M 24 MHz duty cycle 40 50 60 %DCILOILO duty cycle 20 50 80 %Step24M

Page 33

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 39 of 71Table 30. 2.7-V AC Chip-Level SpecificationsSymbol Description Min Typ

Page 34

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 4 of 71PSoC Functional OverviewThe PSoC family consists of many programmablesyst

Page 35

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 40 of 71Figure 11. PLL Lock Timing DiagramFigure 12. PLL Lock for Low Gain Set

Page 36

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 41 of 71AC GPIO SpecificationsThese tables list the guaranteed maximum and minim

Page 37

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 42 of 71AC Operational Amplifier SpecificationsThe following tables list the gua

Page 38

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 43 of 71When bypassed by a capacitor on P2[4], the noise of the analog ground si

Page 39

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 44 of 71Figure 15. Typical Opamp Noise AC Low Power Comparator SpecificationsTa

Page 40

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 45 of 71AC Digital Block SpecificationsThe following tables list the guaranteed

Page 41

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 46 of 71Table 38. 2.7-V AC Digital Block SpecificationsFunction Description Min

Page 42

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 47 of 71AC Analog Output Buffer SpecificationsThe following tables list the guar

Page 43

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 48 of 71AC External Clock SpecificationsThe following tables list the guaranteed

Page 44

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 49 of 71 AC Programming SpecificationsTab le 45 lists the guaranteed maximum an

Page 45

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 5 of 71Analog SystemThe analog system consists of six configurable blocks, eachc

Page 46

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 50 of 71AC I2C SpecificationsThe following tables list the guaranteed maximum an

Page 47

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 51 of 71Packaging InformationThis section illustrates the packaging specificatio

Page 48

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 52 of 71Figure 18. 8-Pin (150-Mil) SOIC Figure 19. 20-Pin (300-Mil) Molded DIP

Page 49

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 53 of 71Figure 20. 20-Pin (210-Mil) SSOP Figure 21. 20-Pin (300-Mil) Molded SO

Page 50

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 54 of 71Figure 22. 28-Pin (300-Mil) Molded DIPFigure 23. 28-Pin (210-Mil) SSOP

Page 51

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 55 of 71Figure 24. 28-Pin (300-Mil) Molded SOIC 51-85026 *H

Page 52

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 56 of 71Figure 25. 32-Pin Sawn QFN Package Important Note For information on th

Page 53

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 57 of 71Thermal Impedances Capacitance on Crystal Pins Solder Reflow Specificat

Page 54

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 58 of 71Development Tool SelectionThis section presents the development tools av

Page 55

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 59 of 71Device ProgrammersAll device programmers can be purchased from the Cypre

Page 56

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 6 of 71Additional System ResourcesSystem resources, some of which are listed in

Page 57

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 60 of 71Ordering InformationThe following table lists the CY8C24x23A PSoC device

Page 58

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 61 of 71AcronymsAcronyms UsedTab le 53 lists the acronyms that are used in this

Page 59

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 62 of 71Document ConventionsUnits of MeasureTab le 54 lists the unit sof measur

Page 60

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 63 of 71bias 1. A systematic deviation of a value from a reference value.2. The

Page 61

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 64 of 71duty cycle The relationship of a clock period high time to its low time

Page 62

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 65 of 71microcontroller An integrated circuit chip that is designed primarily f

Page 63

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 66 of 71shift register A memory storage device that sequentially shifts a word

Page 64

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 67 of 71ErrataThis section describes the errata for the CY8C24xxxA device family

Page 65

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 68 of 71Document History PageDocument Title: CY8C24123A/CY8C24223A/CY8C24423A, P

Page 66

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 69 of 71*L 2897881 MAXK / NJF03/23/2010 Add “More Information” on page 2. Update

Page 67

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 7 of 71Getting StartedFor in depth information, along with detailed programmingd

Page 68

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 70 of 71*T4066332 PMAD 07/17/2013 Added Errata Footnotes (Note 1, 19).Updated PS

Page 69

Document Number: 38-12028 Rev. *V Revised January 13, 2015 Page 71 of 71PSoC Designer™ is a trademark and PSoC® is a registered trademark of Cypress

Page 70

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 8 of 71Development ToolsPSoC Designer™ is the revolutionary integrated designenv

Page 71

CY8C24123ACY8C24223ACY8C24423ADocument Number: 38-12028 Rev. *V Page 9 of 71Designing with PSoC DesignerThe development process for the PSoC device d

Comments to this Manuals

No comments