Cypress Semiconductor Perform CY8C21x23 User Manual

Browse online or download User Manual for Battery chargers Cypress Semiconductor Perform CY8C21x23. PSoC™ Mixed-Signal Array Final Data Sheet

  • Download
  • Add to my manuals
  • Print
  • Page
    / 33
  • Table of contents
  • BOOKMARKS
  • Rated. / 5. Based on customer reviews
Page view 0
February 25, 2005 © Cypress Semiconductor Corp. 2004-2005 — Document No. 38-12022 Rev. *G 1
PSoC™ Mixed-Signal Array Final Data Sheet
CY8C21123,
CY8C21223, and CY8C21323
PSoC™ Functional Overview
The PSoC™ family consists of many Mixed-Signal Array with
On-Chip Controller devices. These devices are designed to
replace multiple traditional MCU-based system components
with one, low cost single-chip programmable component. A
PSoC device includes configurable blocks of analog and digital
logic, as well as programmable interconnect. This architecture
allows the user to create customized peripheral configurations,
to match the requirements of each individual application. Addi-
tionally, a fast CPU, Flash program memory, SRAM data mem-
ory, and configurable IO are included in a range of convenient
pinouts.
The PSoC architecture, as illustrated on the left, is comprised of
four main areas: the Core, the System Resources, the Digital
System, and the Analog System. Configurable global bus
resources allow all the device resources to be combined into a
complete custom system. Each PSoC device includes four digi-
tal blocks. Depending on the PSoC package, up to two analog
comparators and up to 16 general purpose IO (GPIO) are also
included. The GPIO provide access to the global digital and
analog interconnects.
The PSoC Core
The PSoC Core is a powerful engine that supports a rich
instruction set. It encompasses SRAM for data storage, an
interrupt controller, sleep and watchdog timers, and IMO (inter-
nal main oscillator) and ILO (internal low speed oscillator). The
Features
Powerful Harvard Architecture Processor
M8C Processor Speeds to 24 MHz
Low Power at High Speed
2.4V to 5.25V Operating Voltage
Operating Voltages Down to 1.0V Using
On-Chip Switch Mode Pump (SMP)
Industrial Temperature Range: -40°C to +85°C
Advanced Peripherals (PSoC Blocks)
4 Analog Type “E” PSoC Blocks Provide:
- 2 Comparators with DAC Refs
- Single or Dual 8-Bit 8:1 ADC
4 Digital PSoC Blocks Provide:
- 8- to 32-Bit Timers, Counters, and PWMs
- CRC and PRS Modules
- Full-Duplex UART, SPI Master or Slave
- Connectable to All GPIO Pins
Complex Peripherals by Combining Blocks
Flexible On-Chip Memory
4K Flash Program Storage 50,000 Erase/Write
Cycles
256 Bytes SRAM Data Storage
In-System Serial Programming (ISSP)
Partial Flash Updates
Flexible Protection Modes
EEPROM Emulation in Flash
Complete Development Tools
Free Development Software
(PSoC™ Designer)
Full-Featured, In-Circuit Emulator and
Programmer
Full Speed Emulation
Complex Breakpoint Structure
128 Bytes Trace Memory
Precision, Programmable Clocking
Internal ±2.5% 24/48 MHz Oscillator
Internal Oscillator for Watchdog and Sleep
Programmable Pin Configurations
25 mA Drive on All GPIO
Pull Up, Pull Down, High Z, Strong, or Open
Drain Drive Modes on All GPIO
Up to 8 Analog Inputs on GPIO
Configurable Interrupt on All GPIO
Additional System Resources
I
2
C™ Master, Slave and Multi-Master to
400 kHz
Watchdog and Sleep Timers
User-Configurable Low Voltage Detection
Integrated Supervisory Circuit
On-Chip Precision Voltage Reference
DIGITAL SYSTEM
SRAM
System Bus
Interr upt
Controller
Sleep and
Watchdog
Clock Sources
(Includes IMO and ILO)
Global Digital Interconnect
Global Analog Interconnect
PSoC
CORE
CPU Core
(M8C)
SROM Flash
I2C
Internal
Voltage
Ref .
Digital
Clocks
POR and LVD
System Resets
SYSTEM RESOURCES
ANALOG SYSTEM
Analog
Ref .
Por t 1 Por t 0
Digital
PSoC Block
Array
Analog
PSoC Block
Array
Sw itch
Mode
Pump
Page view 0
1 2 3 4 5 6 ... 32 33

Summary of Contents

Page 1 - CY8C21223, and CY8C21323

February 25, 2005 © Cypress Semiconductor Corp. 2004-2005 — Document No. 38-12022 Rev. *G 1PSoC™ Mixed-Signal Array Final Data SheetCY8C21123,CY8C212

Page 2 - The Digital System

February 25, 2005 Document No. 38-12022 Rev. *G 10CY8C21x23 Final Data Sheet 1. Pin Information1.1.4 24-Pin Part Pinout Table 1-4. 24-Pin Part Pino

Page 3 - PSoC Device Characteristics

February 25, 2005 Document No. 38-12022 Rev. *G 112. Register ReferenceThis chapter lists the registers of the CY8C21x23 PSoC device. For detailed reg

Page 4 - Development Tools

February 25, 2005 Document No. 38-12022 Rev. *G 12CY8C21x23 Final Data Sheet 2. Register ReferenceRegister Map Bank 0 Table: User Space NameAddr (0,H

Page 5 - Hardware Tools

February 25, 2005 Document No. 38-12022 Rev. *G 13CY8C21x23 Final Data Sheet 2. Register ReferenceRegister Map Bank 1 Table: Configuration Space Nam

Page 6 - Designing with User Modules

February 2005 Document No. 38-12022 Rev. *G 143. Electrical SpecificationsThis chapter presents the DC and AC electrical specifications of the CY8C21x

Page 7 - Table of Contents

February 25, 2005 Document No. 38-12022 Rev. *G 15CY8C21x23 Final Data Sheet 3. Electrical Specifications3.1 Absolute Maximum Ratings 3.2 Operating

Page 8 - 1. Pin Information

February 25, 2005 Document No. 38-12022 Rev. *G 16CY8C21x23 Final Data Sheet 3. Electrical Specifications3.3.2 DC General Purpose IO SpecificationsTh

Page 9 - 1.1.3 20-Pin Part Pinout

February 25, 2005 Document No. 38-12022 Rev. *G 17CY8C21x23 Final Data Sheet 3. Electrical Specifications3.3.3 DC Amplifier SpecificationsThe follow

Page 10 - 1.1.4 24-Pin Part Pinout

February 25, 2005 Document No. 38-12022 Rev. *G 18CY8C21x23 Final Data Sheet 3. Electrical Specifications3.3.4 DC Switch Mode Pump SpecificationsThe

Page 11 - 2. Register Reference

February 25, 2005 Document No. 38-12022 Rev. *G 19CY8C21x23 Final Data Sheet 3. Electrical Specifications3.3.5 DC POR and LVD SpecificationsThe follo

Page 12

February 25, 2005 Document No. 38-12022 Rev. *G 2CY8C21x23 Final Data Sheet PSoC™ OverviewCPU core, called the M8C, is a powerful processor with speed

Page 13

February 25, 2005 Document No. 38-12022 Rev. *G 20CY8C21x23 Final Data Sheet 3. Electrical Specifications3.3.6 DC Programming SpecificationsThe follo

Page 14 - 3. Electrical Specifications

February 25, 2005 Document No. 38-12022 Rev. *G 21CY8C21x23 Final Data Sheet 3. Electrical Specifications3.4 AC Electrical Characteristics3.4.1 AC Ch

Page 15 - 3.2 Operating Temperature

February 25, 2005 Document No. 38-12022 Rev. *G 22CY8C21x23 Final Data Sheet 3. Electrical SpecificationsFigure 3-3. 24 MHz Period Jitter (IMO) Timin

Page 16

February 25, 2005 Document No. 38-12022 Rev. *G 23CY8C21x23 Final Data Sheet 3. Electrical Specifications3.4.2 AC General Purpose IO SpecificationsTh

Page 17

February 25, 2005 Document No. 38-12022 Rev. *G 24CY8C21x23 Final Data Sheet 3. Electrical Specifications3.4.3 AC Amplifier SpecificationsThe followi

Page 18 - = 10 µF capacitor, D

February 25, 2005 Document No. 38-12022 Rev. *G 25CY8C21x23 Final Data Sheet 3. Electrical SpecificationsTable 3-20. 2.7V AC Digital Block Specificat

Page 19

February 25, 2005 Document No. 38-12022 Rev. *G 26CY8C21x23 Final Data Sheet 3. Electrical Specifications3.4.5 AC External Clock SpecificationsThe fo

Page 20

February 25, 2005 Document No. 38-12022 Rev. *G 27CY8C21x23 Final Data Sheet 3. Electrical Specifications3.4.6 AC Programming SpecificationsThe follo

Page 21

February 25, 2005 Document No. 38-12022 Rev. *G 28CY8C21x23 Final Data Sheet 3. Electrical Specifications Figure 3-6. Definition for Timing for Fast/

Page 22 - Jitter32k

February 25, 2005 Document No. 38-12022 Rev. *G 294. Packaging Information4. Packaging InformationThis chapter illustrates the packaging specification

Page 23

February 25, 2005 Document No. 38-12022 Rev. *G 3CY8C21x23 Final Data Sheet PSoC™ Overview Analog System Block Diagram, CY8C21x23Additional System Res

Page 24

February 25, 2005 Document No. 38-12022 Rev. *G 30CY8C21x23 Final Data Sheet 4. Packaging InformationFigure 4-2. 16-Lead (150-Mil) SOICFigure 4-3. 20

Page 25

February 25, 2005 Document No. 38-12022 Rev. *G 31CY8C21x23 Final Data Sheet 4. Packaging InformationFigure 4-4. 24-Lead (4x4) MLF4.2 Thermal Impedan

Page 26

February 25, 2005 Document No. 38-12022 Rev. *G 325. Ordering InformationThe following table lists the CY8C21x23 PSoC device’s key package features an

Page 27 - C Specifications

February 25, 2005 © Cypress Semiconductor Corp. 2004-2005 — Document No. 38-12022 Rev. *G 336. Sales and Service InformationTo obtain information abou

Page 28 - SUDATI2C

February 25, 2005 Document No. 38-12022 Rev. *G 4CY8C21x23 Final Data Sheet PSoC™ OverviewGetting StartedThe quickest path to understanding the PSoC s

Page 29 - 4. Packaging Information

February 25, 2005 Document No. 38-12022 Rev. *G 5CY8C21x23 Final Data Sheet PSoC™ OverviewPSoC Designer Software SubsystemsDevice EditorThe device edi

Page 30 - 51-85077 *C

February 25, 2005 Document No. 38-12022 Rev. *G 6CY8C21x23 Final Data Sheet PSoC™ OverviewDesigning with User Modules The development process for the

Page 31 - 51-85203 **

February 25, 2005 Document No. 38-12022 Rev. *G 7CY8C21x23 Final Data Sheet PSoC™ OverviewDocument ConventionsAcronyms UsedThe following table lists t

Page 32 - 5. Ordering Information

February 25, 2005 Document No. 38-12022 Rev. *G 81. Pin InformationThis chapter describes, lists, and illustrates the CY8C21x23 PSoC device pins and p

Page 33 - 6.1 Revision History

February 25, 2005 Document No. 38-12022 Rev. *G 9CY8C21x23 Final Data Sheet 1. Pin Information1.1.3 20-Pin Part Pinout Table 1-3. 20-Pin Part Pinout

Comments to this Manuals

No comments