Cypress Semiconductor Perform CY8C21x23 User Manual download pdf (Page 25)

February 25, 2005 Document No. 38-12022 Rev. *G 25

CY8C21x23 Final Data Sheet 3. Electrical Specifications

Table 3-20. 2.7V AC Digital Block Specifications

Function Description Min Typ Max Units Notes

All

Functions

Maximum Block Clocking Frequency 12.7 MHz 2.4V < Vdd < 3.0V.

Timer Capture Pulse Width

100

– – ns

Maximum Frequency, With or Without Capture – – 12.7 MHz

Counter Enable Pulse Width 100 – – ns

Maximum Frequency, No Enable Input – – 12.7 MHz

Maximum Frequency, Enable Input – – 12.7 MHz

Dead Band Kill Pulse Width:

Asynchronous Restart Mode 20 – – ns

Synchronous Restart Mode 100 – – ns

Disable Mode 100 – – ns

Maximum Frequency – – 12.7 MHz

CRCPRS

(PRS Mode)

Maximum Input Clock Frequency – – 12.7 MHz

CRCPRS

(CRC Mode)

Maximum Input Clock Frequency – – 12.7 MHz

SPIM Maximum Input Clock Frequency – – 6.35 MHz Maximum data rate at 3.17 MHz due to 2 x over

clocking.

SPIS Maximum Input Clock Frequency – – 4.1 MHz

Width of SS_ Negated Between Transmissions

100

– – ns

Transmitter Maximum Input Clock Frequency – – 12.7 MHz Maximum data rate at 1.59 MHz due to 8 x over

clocking.

Receiver Maximum Input Clock Frequency – – 12.7 MHz Maximum data rate at 1.59 MHz due to 8 x over

clocking.

a. 100 ns minimum input pulse width is based on the input synchronizers running at 12 MHz (84 ns nominal period).

1 2 ... 20 21 22 23 24 25 26 27 28 29 30 31 32 33

No comments

Cypress Semiconductor Perform CY8C21x23 User Manual Page 25