CY8C24123A
CY8C24223A
CY8C24423A
Document Number: 38-12028 Rev. *V Page 68 of 71
Document History Page
Document Title: CY8C24123A/CY8C24223A/CY8C24423A, PSoC
®
Programmable System-on-Chip
Document Number: 38-12028
Revision ECN
Orig. of
Change
Submission
Date
Description of Change
** 236409 SFV See ECN New silicon and new document – Preliminary datasheet.
*A 247589 SFV See ECN Changed the title to read “Final” datasheet. Updated Electrical Specifications
chapter.
*B 261711 HMT See ECN Input all SFV memo changes. Updated Electrical Specifications chapter.
*C 279731 HMT See ECN Update Electrical Specifications chapter, including 2.7 VIL DC GPIO spec. Add
Solder Reflow Peak Temperature table. Clean up pinouts and fine tune wording
and format throughout.
*D 352614 HMT See ECN Add new color and CY logo. Add URL to preferred dimensions for mounting MLF
packages. Update Transmitter and Receiver AC Digital Block Electrical Specifi-
cations. Re-add ISSP pinout identifier. Delete Electrical Specification sentence
re: devices running at greater than 12 MHz. Update Solder Reflow Peak Temper-
ature table. Fix CY.com URLs. Update CY copyright.
*E 424036 HMT See ECN Fix SMP 8-pin SOIC error in Feature and Order table. Update 32-pin QFN E-Pad
dimensions and rev. *A. Add ISSP note to pinout tables. Update typical and
recommended Storage Temperature per industrial specs. Add OCD
non-production pinout and package diagram. Update CY branding and QFN
convention. Update package diagram revisions.
*F 521439 HMT See ECN Add Low Power Comparator (LPC) AC/DC electrical spec. tables. Add new Dev.
Tool section. Add CY8C20x34 to PSoC Device Characteristics table.
*G 2256806 UVS /
PYRS
See ECN Added Sawn pin information.
*H 2425586 DSO /
AESA
See ECN Corrected Ordering Information to include CY8C24423A-24LTXI and
CY8C24423A-24LTXIT
*I 2619935 OGNE /
AESA
12/11/2008 Changed title to “CY8C24123A, CY8C24223A, CY8C24423A PSoC
®
Programmable System-on-Chip™”
Updated package diagram 001-30999 to *A.
Added note on digital signaling in DC Analog Reference Specifications on page
28.
Added Die Sales information note to Ordering Information on page 60.
*J 2692871 DPT /
PYRS
04/16/2009 Updated Max package thickness for 32-pin QFN package
Formatted Notes
Updated “Getting Started” on page 7
Updated “Development Tools” on page 8 and “Designing with PSoC Designer”
on page 9
*K 2762168 JVY /
AESA
06/25/2009
Updated DC GPIO, AC Chip-Level, and AC Programming Specifications as
follows:
Modified FIMO6 and TWRITE specifications.
Replaced T
RAMP
(time) specification with SR
POWER_UP
(slew rate) specification.
Added note [9] to Flash Endurance specification.
Added IOH, IOL, DC
ILO
, F
32K_U
, T
POWERUP
, T
ERASEALL
, T
PROGRAM_HOT
, and
T
PROGRAM_COLD
specifications.
(46 pages)
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