Cypress Semiconductor Perform CY8C24x94 Specifications Page 24

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CY8C24123A
CY8C24223A
CY8C24423A
Document Number: 38-12028 Rev. *V Page 24 of 71
DC Analog Output Buffer Specifications
The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to
5.25 V and –40 °C T
A
85 °C, 3.0 V to 3.6 V and –40 °C T
A
85 °C, or 2.4 V to 3.0 V and –40 °C T
A
85 °C, respectively.
Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only.
Table 18. 5-V DC Analog Output Buffer Specifications
Symbol Description Min Typ Max Units Notes
C
L
Load Capacitance 200 pF This specification applies to the
external circuit that is being
driven by the analog output
buffer.
V
OSOB
Input offset voltage (absolute value) 3 12 mV
TCV
OSOB
Average input offset voltage drift +6 V/°C
V
CMOB
Common mode input voltage range 0.5 V
DD
– 1.0 V
R
OUTOB
Output resistance
Power = low
Power = high
1
1
W
W
V
OHIGHOB
High output voltage swing
(Load = 32 ohms to V
DD/2
)
Power = low
Power = high
0.5 × V
DD
+ 1.1
0.5 × V
DD
+ 1.1
V
V
V
OLOWOB
Low output voltage swing
(Load = 32 ohms to V
DD/2
)
Power = low
Power = high
.5 × V
DD
– 1.3
0.5 × V
DD
– 1.3
V
V
I
SOB
Supply current including Opamp bias
cell
(No Load)
Power = low
Power = high
1.1
2.6
5.1
8.8
mA
mA
PSRR
OB
Supply voltage rejection ratio 52 64 dB V
OUT
> (V
DD
– 1.25)
Table 19. 3.3-V DC Analog Output Buffer Specifications
Symbol Description Min Typ Max Units Notes
C
L
Load Capacitance 200 pF This specification applies to the
external circuit that is being driven
by the analog output buffer.
V
OSOB
Input offset voltage (absolute value) 3 12 mV
TCV
OSOB
Average input offset voltage drift +6 V/°C
V
CMOB
Common mode input voltage range 0.5 V
DD
– 1.0 V
R
OUTOB
Output resistance
Power = low
Power = high
1
1
V
OHIGHOB
High output voltage swing (Load = 1 K
ohms to V
DD/2
)
Power = low
Power = high
0.5 × V
DD
+ 1.0
0.5 × V
DD
+ 1.0
V
V
V
OLOWOB
Low output voltage swing (Load = 1 K
ohms to V
DD/2
)
Power = low
Power = high
0.5 × V
DD
– 1.0
0.5 × V
DD
– 1.0
V
V
I
SOB
Supply current including Opamp bias
cell
(no load)
Power = low
Power = high
0.8
2.0
2.0
4.3
mA
mA
PSRR
OB
Supply voltage rejection ratio 52 64 dB V
OUT
> (V
DD
– 1.25)
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