Cypress Semiconductor Perform CY8C24x94 User Manual Page 11

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PSoC® 1 ISSP Programming Specifications, Document No. 001-15239 Rev. *J 11
Programming Flow
Figure 3-4. Initialize Target Procedure
3.2.1 Reset Mode
The timing to enter programming mode with Reset is shown
in Figure 3-5. To initialize the part using the XRES line, first
wait until V
DD
is stable, and then assert the XRES line for
the time specified by T
xres
(see Table 4-2 on page 19). After
XRES is driven low, there is a window of time specified by
T
xresini
, as shown in Table 4-2 on page 19, in which the first
nine bits of the Initialize 1 vector-set must be transmitted.
When the target executes the operation, it drives the SDATA
line high. The programmer must wait and poll the SDATA
line for a high-to-low transition, which is the signal from the
target that the Initialize 1 operation has completed.
Next, send Initialize 2 vectors, wait for a high-to-low
transition on SDATA, and then send Initialize 3 vectors.
The programmer must sense the system supply and decide
which Initialize 3 vectors to supply. If V
DD
3.6 V, use one
set; if V
DD
> 3.6 V, use the other. (Appendix A on page 21).
Figure 3-5. Using Reset to Initialize
Wait and Poll for
SDATA going low
Toggle XRES on
Device
Send
Initialize 1 Vector
Begin Initialize
Target
End Initalize Target
Power cycle
or
Reset mode?
Assert V
DD
Wait for
TVDDwait
Wait and Poll for
SDATA going low
Assert V
DD
Reset
Power cycle
Send
Initialize 2 Vectors
Wait and Poll for
SDATA going low
Send
Initialize 3 Vectors
Txres Txresini
XRES
SDATA
SCLK
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