Cypress Semiconductor ISR 37000 CPLD User Manual download pdf (Page 27)

Ultra37000 CPLD Family

Document Number : 38-03007 Rev. *G Page 27 of 43

CY37128V

CY37192V

Typical 3.3V Power Consumption (continued)

0

10

20

30

40

50

60

70

80

0 20 40 60 80 100 120 140

Frequency (MHz)

Icc (mA)

Low Power

High Speed

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

V

CC

= 3.3V, T

A

= Room Temperature

0

20

40

60

80

100

120

0 20 40 60 80 100 120

Frequency (MHz)

Icc (mA)

Low Power

High Speed

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

V

CC

= 3.3V, T

A

= Room Temperature

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Ultra37000 CPLD Family 1

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