Cypress Semiconductor CY7C1511V18 User Manual download pdf (Page 2)

CY7C1511V18, CY7C1526V18

CY7C1513V18, CY7C1515V18

Document Number: 38-05363 Rev. *F Page 2 of 32

Logic Block Diagram (CY7C1511V18)

Logic Block Diagram (CY7C1526V18)

2M x 8 Array

CLK

A

(20:0)

Gen.

K

K

Control

Logic

Address

Register

D

[7:0]

Read Add. Decode

Read Data Reg.

RPS

WPS

Control

Logic

Address

Register

Reg.

Reg.

Reg.

16

21

32

8

NWS

[1:0]

V

REF

Write Add. Decode

Write

Reg

16

A

(20:0)

21

8

CQ

CQ

DOFF

Q

[7:0]

8

8

8

Write

Reg

Write

Reg

Write

Reg

C

C

2M x 8 Array

2M x 8 Array

2M x 8 Array

8

CLK

A

(20:0)

Gen.

K

K

Control

Logic

Address

Register

D

[8:0]

Read Add. Decode

Read Data Reg.

RPS

WPS

Control

Logic

Address

Register

Reg.

Reg.

Reg.

18

21

36

9

BWS

[0]

V

REF

Write Add. Decode

Write

Reg

18

A

(20:0)

21

9

CQ

CQ

DOFF

Q

[8:0]

9

9

9

Write

Reg

Write

Reg

Write

Reg

C

C

2M x 9 Array

2M x 9 Array

2M x 9 Array

2M x 9 Array

9

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