Cypress Semiconductor SL811HS Specifications Page 18
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- Table of contents
- BOOKMARKS
- SL811HS 1
- License Agreement 3
- 1.0 Conventions 4
- 2.0 Definitions 4
- 3.0 References 4
- 4.0 Introduction 4
- Master/Slave 5
- Controller 5
- 4.5 Interrupt Controller 6
- 4.6 Buffer Memory 6
- 4.7 PLL Clock Generator 6
- 5.0 SL811HS Registers 8
- 5.2 USB Control Registers 9
- 5.3 SL811HS Control Registers 12
- SL811HSH 16
- 99'' 18
- Y1 &7 18
- SL811HST 19
- SL811HST 21
- YYWW-X.X 21
- XXXX 21
- 7.1 Absolute Maximum Ratings 22
- RESET TIMING 26
- CLOCK TIMING 27
- 8.0 Package Diagrams 28
- 28-pin PLCC 28
- 48-pin TQFP 28
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